Title: VHDL : Modular Design and Synthesis of Cores and Systems, 3rd Edition (With CD-ROM) Author: Zainalabedin Navabi ISBN: 0071475451 / 9780071475457 Format: Hard Cover Pages: 531 Publisher: McGraw-Hill Year: 2007 Availability: In Stock
Description
Feature
Contents
Utilize the Latest VHDL Tools and Techniques for Designing Embedded Cores, Cutting-Edge Processors, RT Level Components, and Complex Digital Systems
The classic VHDL : Modular Design and Synthesis of Cores and Systems has been fully updated to cover methodologies of modern design and the latest uses of VHDL for digital system design. The book shows you how to utilize VHDL to create specific constructs for specific hardware parts, focusing on VHDL's new libraries and packages.
This cutting-edge resource explores the design of RT level components; the application of these components in a core-based design; and the development of a complete processor design with its hardware and software as a core in a system-on-a-chip (SoC). Filled with over 150 illustrations, VHDL : Modular Design and Synthesis of Cores and Systems features :
• An entire toolkit for register-transfer level digital system design
• Testbench development techniques
• New to this edition: Coverage of the latest uses of VHDL for digital system design, design of IP cores, interactive and self checking testbench development, and VHDL's new libraries and packages
Preface
Introduction
Acknowledgments
Chapter 1 : Digital System Design Automation with VHDL Chapter 2 : RTL Design with VHDL Chapter 3 : VHDL Constructs for Structure and Hierarchy Descriptions Chapter 4 : Concurrent Constructs for RT Level Descriptions Chapter 5 : Sequential Constructs for RT Level Descriptions Chapter 6 : VHDL Language Utilities and Packages Chapter 7 : VHDL Signal Model Chapter 8 : Hardware Cores and Models Chapter 9 : Core Design and Testability Chapter 10 : Design, Test and Application of a Processor Core
Appendix A : VHDL Keywords
Appendix B : VHDL Language Grammar
Appendix C : VHDL Standard Packages
Appendix D : STD_LOGIC_1164 Package
Appendix E : STD_LOGIC_TEXTIO Package
Appendix F : STD_LOGIC_ARITH Package
Appendix G : STD_LOGIC_Signed
Appendix H : STD_LOGIC_Unsigned
Appendix I : math_real Package
Index